!FPGAアプリの性能予測関連
* https://ieeexplore.ieee.org/abstract/document/8735547 Automated Design Space Exploration and Roofline Analysis for FPGA-Based HLS Applications
* https://re.public.polimi.it/retrieve/handle/11311/1179076/638345/dovado_raw21.pdf Dovado: An Open-Source Design Space Exploration Framework
* https://arxiv.org/abs/2002.00190 Improving Performance Estimation for FPGA-based Accelerators for Convolutional Neural Networks
* https://ieeexplore.ieee.org/abstract/document/7519659 High-level performance estimation of image processing design using FPGA
** Cabinet/FPGA/High-levelPerformanceEstimationofImageProcessingDesignusingFPGA.pdf
* https://ieeexplore.ieee.org/abstract/document/6645552 Comparing and combining GPU and FPGA accelerators in an image processing context
** Cabinet/FPGA/ComparisonandCollaborationofGPUandFPGAsinanImageProcessingContext.pdf
* https://dl.acm.org/doi/10.1155/2013/428078 Performance modeling for FPGAs: extending the roofline model with high-level synthesis tools
* http://res4ant.deib.polimi.it/2016/presentations/Cathal_2016-03-17_DATE_resource_aware_hetrogeneous_computing.pdf Programming and Benchmarking FPGAs with Software-Centric Design Entries
* https://dl.acm.org/doi/10.1145/3120895.3120897 A Hardware-Based Caching System on FPGA NIC for Blockchain
* https://iris.unife.it/handle/11392/2418060 Energy-Efficiency Evaluation of FPGAs for Floating-Point Intensive Workloads
* https://dblp.org/rec/conf/cidr/ChenCBHHWC20.html Is FPGA Useful for Hash Joins?
* https://www.sciencedirect.com/science/article/pii/S074373151730165X FPGA design space exploration for scientific HPC applications using a fast and accurate cost model based on roofline analysis
* https://ieeexplore.ieee.org/document/9535217 A Comprehensive Methodology to Optimize FPGA Designs via the Roofline Model
* https://arxiv.org/abs/2103.04808 Scaling up HBM Efficiency of Top-K SpMV for Approximate Embedding Similarity on FPGAs
* https://dl.acm.org/doi/10.1145/3469660 Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects
** Cabinet/FPGA/3469660.pdf